Overview
A 4-layer carrier board for the Raspberry Pi CM5, drawn in Altium for one specific job: the node I actually wanted in the homelab cluster. PoE+ so it needs one cable, an M.2 slot so it can hold real storage, two MIPI camera connectors, and the full GPIO header left intact.
Off-the-shelf carriers always missed one of those. Never the same one twice.
The real exercise is routing
The feature list is the excuse. On a CM5 carrier the hard parts are all in the physical layer — by the time you have PCIe, HDMI, USB, and two camera lanes leaving the connector, the schematic is the easy half and the board is where it gets decided.
Length-matched differential pairs. PCIe and MIPI both send a signal as the difference between two traces. If one leg is longer than the other, the two halves stop arriving together, the difference smears, and the eye closes. So every pair is matched to its partner, and the pairs within a bus are matched to each other, which means deliberately snaking extra length into the short traces until the whole group agrees.
A controlled-impedance stackup. The trace width and the height above the reference plane set the impedance of the line, and the stackup sets that height. Pick the layer order first, get the fab's real dielectric numbers, and solve for widths — rather than routing and hoping. Getting this wrong doesn't fail loudly; it reflects, and the reflections show up as a link that trains at a lower speed or works on three boards out of five.
Return paths. Current goes out on a trace and comes back on the plane directly under it. Split that plane, or route a high-speed pair across a gap in it, and the return current has to go around — which is a loop, and a loop is an antenna. Most of the discipline here is negative space: knowing where not to put a via, a plane split, or a connector cutout.
None of that shows up in a photo of the finished board, which is exactly why it was the project. A board that boots proves the routing was right; there's no partial credit and no way to fake it in firmware later.